The present invention relates to a bipolar transistor and, more particularly, to a heterojunction bipolar transistor and a fabrication method thereof.
When the delay time of a basic gate is compared in terms of a trend in a highly integrated memory of each generation, performance of a bipolar transistor must be improved in the same way as an MOS transistor in order to maintain a superiority of a BiCMOS gate over a CMOS gate in future. When the switching time is compared between the MOS transistor and the bipolar transistor that are used in the BiCMOS gate circuit, the switching speed of the bipolar transistor tends to decrease in the silicon system of the prior art although a high speed switching time can be accomplished in the MOS transistor with the scale-down of the transistor size and its lowering voltage.
One of the high speed bipolar transistors is a heterojunction bipolar transistor which has a difference of the band gap between its base region and emitter region. The characterizing feature of the heterojunction bipolar transistor is that a high current gain can be obtained by preventing the injection of majority carriers from the base region to the emitter region by utilizing the barrier height of the step of the band gap on the hetero-interface of the emitter-base junction. Consequently, since the base concentration can be set to a relatively higher concentration than in the conventional bipolar transistors, the base resistance can be reduced and higher speed performance of the bipolar transistor can be accomplished.
The structure of the conventional heterojunction bipolar transistor uses a silicon-germanium alloy (Si.sub.1-x Ge.sub.x) for its base region, and FIG. 19 shows its sectional view. Reference numeral 2 in the drawing represents an n.sup.+ -Si collector region, 3 is a p-Si.sub.1-x Ge.sub.x base region, 4 is n.sup.+ -Si emitter region, 5 is an emitter electrode, 6 is a base electrode and 7 is a collector electrode. Among them, the X value of Si.sub.1-x Ge.sub.x in the base region is increased from the emitter region side towards the collector region side and the energy band gap becomes narrower from the emitter region side towards the collector region side. Therefore, a drift field is generated in the base region, so that the base transit time of the minority carriers can be shortened and high speed performance of the bipolar transistor can thus be accomplished.
A heterojunction bipolar transistor using the silicon-germanium alloy (Si.sub.1-x Ge.sub.x) for the base is described, for example, in JP-A-1-231371.
According to the prior art described above, since the band gap of the emitter and base regions sharply changes at the emitter-base junction, misfit dislocations resulting from the lattice mismatch between silicon and germanium occur in the active regions of the bipolar transistor and problems such as a drop of high speed performance voltage breakdown of the bipolar transistor and an increase of the leakage current result.
Generally, in hetero-epitaxy of lattice mismatched materials such as silicon and germanium, a growth layer coherently grows without generating misfit dislocations and the lattice mismatch is mitigated by a strain in the lattice when a film thickness is below a thickness approximate to a super-lattice, but when the growth layer grows into a thickness about the film thickness necessary for constituting the bipolar transistor, the lattice mismatch invites the strain in the lattice and the misfit dislocations. The occurrence of the misfit dislocations which exerts adverse influences on the electrical characteristics is a critical problem which is unavoidable when a hetero-material of the silicon-germanium alloy (Si.sub.1-x Ge.sub.x) is injected into the Si system bipolar transistor.